With rapid development on integrated circuit (IC) manufacturing technology, size of semiconductor devices in ICs, especially the size of MOS (Metal Oxide Semiconductor) devices, continues to shrink in order to meet the requirements for miniaturization and high-degree-integration of integrated circuits. As the size of the MOS transistor devices decreases continuously, the existing fabrication technology, which uses silicon oxide or silicon oxynitride as the gate dielectric layer, has been challenged. More specifically, transistors with silicon oxide or silicon oxynitride based gate dielectric layer may have certain problems, such as increased leakage current and impurity diffusion, which may affects the threshold voltage of the transistors. Thus, the performance of semiconductor devices based on such transistors may be impacted.
To solve these problems, transistors with high dielectric constant (high-K) metal gate structures have been introduced. By replacing the silicon oxide or silicon oxynitride gate dielectric materials with the high-K materials, the leakage current can be reduced while the size of the semiconductor devices decreases, and the performance of the semiconductor devices can be improved.
However, under current fabrication processes, transistors with high-K metal gate structures may still generate leakage current and may also have bias temperature instability. The disclosed methods and systems are directed to solve one or more problems set forth above and other problems.